INDIA, BENGALURU, January 28, 2016 – Xilinx, Inc. will be demonstrating its next generation Video Over IP, Processing and Connectivity solutions for the Broadcast and Pro A/V industry at ISE 2016. Xilinx and its Alliance Program Members will showcase technologies that increase innovation and acceleration for faster time-to-market solutions with a comprehensive suite of IP and all programmable FPGAs and SoCs for video processing, display, IP network connectivity, and compression codecs. Xilinx will be exhibiting in Booth #DL-285 at ISE, February 9-12, 2016, at the RAI in Amsterdam.
Xilinx Demonstrations – Booth #DL-285
- 4K Video Connectivity – Xilinx IP cores for HDMI® 1.4, HDMI 2.0, and DisplayPort™ 1.2 will be demonstrated on Xilinx® KC705 Kintex®-7 FPGA Evaluation Kits along with FMCs (FPGA Mezzanine Cards) from Inrevium AMERICA. The cores and associated reference designs also support HDCP content protection and offer a robust and cost effective solution to integrate 4K capable interfaces into any professional A/V application.
- Real Time 4K UHD Video Processing – Based on the Omnitek Scalable Video Processor (OSVP) IP core, and running on the Zynq® All Programmable SoC, this reference design demonstrates highly configurable multi-format up/down conversion up to 4K 60Hz in real time, and implements a broadcast quality deinterlacer as well as 6-axis color correction (e.g. for Rec 709 to Rec 2020). A new warp and rotate engine for projection systems, video conferencing, and digital signage applications will also be shown for creating arbitrary image warps on a single 4K 60Hz video stream or stitching together multiple HD video images.
- Modular Video over IP – A new proof-of-concept demonstration based on the Xilinx KC705 Kintex-7 FPGA Evaluation Kit integrates the newly released Xilinx modular video over IP framework with the Xilinx HDMI IP cores to show how this flexible approach can be used to implement HDMI 2.0 over IP using RFC4175, and to form a foundation for a variety of Video over IP products. Based on AXI4-S interconnects, it is possible for customers to use a variety of video IP blocks from Xilinx, ecosystem members, as well as their own designs to implement standard and proprietary IP encapsulation methods for “Any Media over Any Network.”
- 4K and High Frame Rate Video over IP – Demonstrations of lightweight and ultra-low latency compression for transmission of 4K and HFR video over IP will be shown from Xilinx Alliance Program Members. Barco Silex will be showcasing their VC-2 LD (Low Delay) codec and intoPIX will show their TICO low-latency codec, each demonstration showing how these codecs can be integrated with Xilinx cores for SMPTE ST 2022 to provide encapsulation of video over IP networks. Both techniques have very low complexity, take few FPGA resources, and require no external memory to implement, while retaining visually lossless quality, and reduced bandwidth needs so that existing cabling and storage infrastructure can be re-used.
