Company extends its SDx product family and continues to expand its user base to the broad community of systems and software engineers
Bangalore, India- March 9, 2015 –Xilinx, Inc. announced the SDSoC™ Development Environment for All Programmable SoCs and MPSoCs. The third member of the Xilinx® SDx™ family of development environments, the SDSoC development environment enables the broader community of embedded software developers to leverage the power of hardware and software ‘all programmable’ devices. The SDSoC environment provides a greatly simplified ASSP-like programming experience including an easy to use Eclipse integrated design environment (IDE) and a comprehensive development platform for heterogeneous Zynq® All Programmable SoCs and MPSoCs deployment. Complete with the industry’s first C/C++ full-system optimizing compiler, SDSoC delivers system level profiling, automated SW acceleration in programmable logic, automated system connectivity generation, and libraries to speed programming. It also enables end user and 3rd party platform developers to rapidly define, integrate, and verify system level solutions and enable their end customers with a customized programming environment.
ASSP-Like Programming Experience
Used by systems and embedded software engineers, SDSoC provides an Eclipse IDE with C/C++ running on bare metal or operating systems such as Linux and FreeRTOS as its input. SDSoC enables the creation of complete heterogeneous multi-processing systems, including reuse of legacy HDL IP Blocks as C-callable libraries. Unlike traditional separate hardware-centric and software-centric flows, which can result in development delays and uncertainty in system architecture and performance, SDSoC is architected to provide rapid system profiling, SW acceleration in programmable logic, and system architecture exploration in a familiar framework.
Full System Optimizing Compiler
SDSoC supplies a full system optimizing compiler targeting both the ARM processors and the programmable logic. SDSoC is designed to enable software teams to rapidly configure, generate macro and micro architectures with automated system connectivity generation. The result is optimal system connectivity and memory interfaces, and rapid system exploration of performance, throughput, and latency with short design iteration times. The compiler leverages a foundational high-level synthesis compiler technology that is utilized by more than 1,000 programmers. In addition, SDSoC provides Xilinx libraries and optional hardware optimized libraries from Alliance Member Auviz Systems, to unharness the high performance and low power acceleration of programmable logic.
System Level Profiling
Building on the advanced software profiling found today in the Xilinx SDK, which enables software-hardware performance measurement of a completed design running on a Zynq platform, SDSoC adds rapid system performance estimation. Leveraging the rapid system performance estimation, users can specify which functions should be accelerated in programmable logic and SDSoC instruments the C/C++ code to report software cycles and estimates for the data transfer as well as overall application speedup. This enables early and rapid generation and exploration for optimal total system performance and power.
Expert Use Model for Platform Developers
SDSoC provides Board Support Packages (BSP) for Zynq All Programmable SoC-based development boards including the ZC702, ZC706, as well as third party and market specific platforms including the Zedboard, MicroZed, ZYBO, and Video and Imaging development kits. The BSPs include metadata abstracting the platform from software developers and system architects easing the creation, integration, and verification of smarter heterogeneous systems. With either Xilinx provided or customer created platforms SDSoC is enabling true software-configurable smarter systems.
“With Xilinx’s new SDSoC Development Environment, in combination with the MicroZed board-based vision platform and Xylon logicBRICKS™ intellectual property for embedded graphics and video, nontraditional FPGA developers are now empowered to rapidly configure, prototype, and develop a complete smart vision system in a familiar C/C++ based workflow.” said Davor Kovacec, founder and CEO of Xylon. “This combination will truly open up the power and potential of All Programmable SoCs and MPSoCs to all design teams.”
