Synopsys Design Platform Certified using 64-bit Arm Cortex-A53 Processor
Bangalore , Jun 15, 2018 —
Highlights:
- Synopsys Design Platform with Fusion Technology™ delivers power, performance, and area benefits for Samsung Foundry’s 7LPP process with extreme ultraviolet (EUV) lithography technology
- Comprehensive full-flow support for single-exposure-based routing and via stapling for maximum design routability in Design Compiler® Graphical RTL synthesis, IC Compiler™ II place-and-route, and PrimeTime® timing signoff
- Tool certification includes scalable 7LPP reference flow compatible with Lynx Design System using the 64-bit Arm® Cortex®-A53 processor for QoR optimization and flow validation
Synopsys, Inc. (Nasdaq: SNPS) today announced that Samsung Foundry has certified the Synopsys Design Platform with Fusion Technology for 7-nanometer (nm) Low Power Plus (LPP) process with Extreme Ultraviolet (EUV) lithography technology. The Synopsys Design Platform provides comprehensive full-flow 7LPP support for EUV single-exposure-based routing and via stapling to ensure maximum design routability and utilization while minimizing IR-drop. Synopsys’ SiliconSmart® library characterization tool was key to developing the foundation IP used for this certification process and reference flow. Samsung Foundry has certified Synopsys Design Platform tools and the reference flow, which is compatible with the Lynx Design System with scripts for automation and design best practices. The reference flow is available through the Samsung Advanced Foundry Ecosystem (SAFE™) program.
“Built through deep collaboration with Synopsys, this certification and reference flow for our 7LPP process will enable our mutual customers to achieve the best power, performance, and area for their designs,” said Ryan Sanghyun Lee, vice president of Foundry Marketing Team at Samsung Electronics. “Our foundry customers can confidently ramp their designs to volume production on our most advanced EUV-based process using the proven Synopsys Design Platform with Fusion Technology.”
“Our tools and reference flow collaboration with Samsung Foundry is focused on enabling designers to get the optimum quality of results with the highest confidence on Samsung Foundry’s latest 7LPP process with EUV,” said Michael Jackson, corporate vice president of marketing and business development for Synopsys’ Design Group. “This scalable 7LPP reference flow based on the Synopsys Design Platform with Fusion Technology will allow designers to easily achieve their desired design and schedule targets.”
The 64-bit Arm Cortex-A53 processor, based on the ARMv8 architecture, was used for quality of results (QoR) optimization and flow certification. Key tools and features of the Synopsys Design Platform 7LPP reference flow include:
- IC Compiler II place-and-route: EUV single-exposure-based routing with optimized 7LPP design rule support, and via stapling to ensure maximum design routability and utilization while minimizing IR-drop
- Design Compiler Graphical RTL synthesis: Correlation, congestion reduction, optimized 7LPP design rule support, and physical guidance for IC Compiler II
- IC Validator physical signoff: High-performance DRC signoff, LVS-aware short-finder, signoff fill, pattern matching, and unique dirty data analysis with Explorer technology, as well as in-design verification for automated DRC repair and accurate timing-aware metal fill within IC Compiler II
- PrimeTime timing signoff: Near-threshold ultra-low voltage variation modeling, via variation modeling, and placement rule-aware engineering change order (ECO) guidance
- StarRC™ parasitic extraction: EUV single pattern-based routing support, and new extraction technologies such as coverage-based via resistance
- RedHawk™ Analysis Fusion: ANSYS® RedHawk™-driven EM/IR analysis and optimization within IC Compiler II including via insertion and power grid augmentation
- DFTMAX™ and TetraMAX® II test: FinFET-based, cell-aware, and slack-based transition testing for higher test quality
- Formality® formal verification: UPF-based equivalence checking with state transition verification
The certified, scalable reference flow compatible with Synopsys’ Lynx Design System is available through the SAFE™ program. The Lynx Design System is a full-chip design environment that includes innovative automation and reporting capabilities to help designers implement and monitor their designs. It includes a production RTL-to-GDSII flow that simplifies and automates many critical implementation and validation tasks, enabling engineers to focus on achieving performance and design goals. The SAFE™ program provides extensively tested process design kits (PDKs) and reference flows (with design methodologies) that are backed by Samsung Foundry’s certification.
