Native SystemVerilog VIP Features Built-in Coverage, Verification Planning, Protocol-Aware Debug and Source Code Test Suites
BANGALORE, Karnataka, July 28, 2016 — Synopsys, Inc. (NASDAQ: SNPS) today announced the availability of the industry’s first verification IP (VIP) and UVM source code test suite for Ethernet 200G. As the requirements for increased bandwidth to support video-on-demand, social networking, and cloud services continue to grow, Synopsys VC VIP for Ethernet 200G enables system-on-chip (SoC) teams to design next-generation networking products with better ease of use and higher verification productivity, resulting in accelerated verification closure.
“Our Ethernet, Multilane-Gearbox (MLG) and FlexE products drive the latest high-speed communications and embedded system networking solutions,” said Francois Balay, president of MorethanIP. “Synopsys’ industry first 200G Ethernet VIP and source code test suite enable the verification process, for rapid introduction of MorethanIP 200G Ethernet high-speed communication IP Cores.”
Synopsys VC VIP for 200G supports 4x50G or 8x25G line interface options with RS-FEC. Synopsys VIP uses a native SystemVerilog/Universal Verification Methodology (UVM) architecture and features built-in comprehensive coverage, verification planning, extensive protocol checks and protocol-aware debug. It features extensive and customizable frame generation and error injection capabilities, with additional source code UNH-IOL test suites also available. Synopsys VIP is also natively integrated with the Verdi® Protocol Analyzer debug solution for the highest debug productivity.
“Synopsys has achieved many industry firsts, including first to deliver a complete Ethernet verification solution for all speeds (25G, 40G, 50G, 100G) and first to support 200G and 400G,” said Vikas Gautam, group director of VIP R&D and corporate applications for the Synopsys Verification Group. “To achieve these industry firsts, Synopsys continues to innovate and provide support for the latest specifications, enabling leading IP design and SoC companies to quickly verify their products and accelerate time to market.”
