Combination of Synopsys Design Ware MIPI DSI IP and Hardent VESA Display Stream Compression IP Enables Single and Dual High-Definition Displays
New Delhi, March.12, 2015 —
Highlights:
• The compliant and interoperable DSI solution reduces data transmission bandwidth by compressing and transmitting video signals through existing display interfaces for ultra-high resolution
• Synopsys’ complete DesignWare™ MIPI® DSI℠Host Controller IP and MIPI® D-PHY℠ IP solution lowers integration risk for application processors, display bridge ICs and multimedia co-processors
• Hardent’sVESADSC Encoder IP is visually lossless and decreases transmission bandwidth by up to 3X, allowing designers to use existing physical and electrical interfaces with higher resolution displays
Synopsys, Inc. and Hardent today availability of a compliant and interoperable Display Serial Interface (DSI) solution that helps reduce the data transmission bandwidth in Ultra-High Definition (UHD) mobile devices. By using Hardent’s Video Electronics Standards Association (VESA) Display Stream Compression (DSC) Encoder IP, video signals can be compressed and transmitted through Synopsys’ DesignWare® MIPI DSI Host Controller IP. This enables higher-resolution displays with reduced bandwidth, while enhancing interoperability and lowering power, electromagnetic interference, and overall system costs.
Synopsys’ Design Ware MIPI DSI Host Controller IP is compliant to the latest MIPI specification v1.2. Combined with the silicon-proven DesignWare MIPI D-PHY, designers have a complete, interoperable MIPI display solution that can be easily integrated into application processors with less risk. The Hardent VESA DSC Encoder IPis compliant with VESADSC standard v1.1 and enables visually lossless video compression between the application processor and the display system inside the system-on-chip (SoC). Hardent’s VESA DSC Encoder IP compresses and transports the video signal to one or more DSI streams utilizing Synopsys’ DesignWare MIPI DSI Host Controller and MIPI D-PHY IP.
“Electronics manufacturers leverage visually lossless compression to enable compelling displays for ultra-high-definition mobile applications,” said Alain Legault, vice president of IP products at Hardent. “We have collaborated with Synopsys, the industry’s trusted provider of high-quality IP, to provide a fully interoperable solution that will allow companies to deliver next-generation displays.”
“The evolution of displays in mobile devices has brought about newSoC design challenges,” said Joel Huloux chairman of the MIPI Alliance. “As an active contributor to the MIPI Alliance Display and PHY working groups for more than 10 years, Synopsys continues to collaborate with other ecosystem partners to establish display interface standards, drive adoption and deliver interoperable IP solutions that foster innovative products implementing MIPI standards.”
“Portable devices, including hand-held, are moving toward 4K resolution, and SoC designers must move in this direction without sacrificing battery life, weight and cost,” said Bill Lempesis, executive director at VESA. “Working with the MIPI Alliance, we’ve established a DSC standard that addresses these requirements. Hardent was an active member of VESA’s DSC Task Group and contributed to the standard, and we’re glad to see this collaboration between Synopsys and Hardent to help enable this new technology for product development.”
“By collaborating with Hardent, we are providing designers with an interoperable and compliant solution that enables them to support ultra-high-definition mobile displays,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “As the leading provider of MIPI IP with more than 200 design wins, Synopsys provides designers with a complete high-performance, low-power DesignWare MIPI DSI IP solution that helps them implement the required functionality into SoCs for the mobile and consumer markets.”
