SAN JOSE, Calif., March 18, 2015—Cadence Design Systems, Inc. announced that Spreadtrum Communications (Shanghai) Co., Ltd. utilized the new Cadence® Innovus™ Implementation System to dramatically reduce the turnaround time of a multi-million-cell 28-nanometer (nm) intellectual property (IP) block while delivering to its power, performance, and area (PPA) goals. Spreadtrum’s TAT for this IP block was reduced significantly while meeting the original PPA targets compared to its previous solution.
Spreadtrum’s turnaround time improvement and capacity gains resulted from rapid convergence on a high-quality placement optimization along with full-flow multi-threading enhancements in the Innovus Implementation System’s new GigaPlace placement engine. Multi-threading, which is pervasive throughout the Innovus Implementation System, enables optimal throughput on 8- and 16-CPU machines, which are common in today’s design server farms.
“The Innovus Implementation System significantly improved the runtime on a critical multi-million-cell IP core compared to our previous solution,” said Robin Lu, vice president of ASIC at Spreadtrum Communications. “With runtimes improved to deliver more than a million cells per day of implementation throughput, we can confidently drive our aggressive schedules in the increasingly competitive mobile device market while delivering excellent quality of results.”
“Spreadtrum’s designs are at the leading edge of complexity for mobile applications, where market windows are very short and hitting aggressive PPA targets with quick turnaround time is crucial,” said Dr. Anirudh Devgan, senior vice president of the Digital and Signoff Group at Cadence. “The Innovus Implementation System speeds these complex implementations by providing an excellent starting placement and then leveraging its massively multi-threaded optimization engines to close PPA targets with best-in-class turnaround times.”
The Innovus Implementation System is a next-generation physical implementation solution that enables system-on-chip (SoC) developers to deliver high-quality designs with best-in-class PPA while accelerating time to market. For more information on the Innovus Implementation System, please visit http://www.cadence.com/news/innovus. Also, see today’s related press release titled, “Cadence Introduces Innovus Implementation System, Delivering Best-in-Class Results with Up to 10X Reduction in Turnaround Time,” at http://www.cadence.com.
