At a media briefing Vincent Fraisse, Group Vice President, RF and Optical Communication, at STMicroelectronics, introduced the company’s latest advancements in silicon photonics technology. As AI-driven workloads and hyperscale data centers demand faster, more power-efficient connectivity, ST is launching its next-generation optical interconnect solutions. Leveraging silicon photonics and BiCMOS technology, ST aims to enable high-speed, low-latency, and energy-efficient data transmission. In this interview, Vincent discusses how ST’s innovations in pluggable and co-packaged optics (CPO) are shaping the future of AI infrastructure, the company’s collaboration with AWS, and the roadmap for high-performance data center interconnects.
Vincent Fraisse is STMicroelectronics’ Group Vice President, responsible for the RF and Optical Communication product sub-group since January 2025. Fraisse started his career as an analog and RF design engineer in France Telecom CNET before joining ST in Italy in mid-90s. In 2009, he joined ST-Ericsson and rose through the technical ladder to become a Fellow in charge of System Architecture and Application processors. In 2012, Fraisse re-joined ST and became General Manager of the RF Communication division, addressing diverse markets, such as satellite communication, RF infrastructure and optical interconnect. Vincent Fraisse was born in Ales, France in 1973 and holds a telecom engineering master’s degree from the IMT-Atlantic and a microelectronics master’s degree from the Grenoble University (UGA) in France.
As AI workloads continue to grow, what challenges do traditional data center connectivity solutions face?
The rapid expansion of AI computing has significantly increased the demand for high-speed, power-efficient interconnects in data centers. Traditional copper and VCSEL-based optical links face limitations in bandwidth, power consumption, and reach. This has led to congestion and performance bottlenecks, particularly in AI clusters where GPUs need fast, low-latency connectivity.
How does STMicroelectronics’ silicon photonics technology address these challenges?
Our silicon photonics (SiPho) technology enables higher data rates, longer reach, and lower power consumption compared to traditional solutions. By integrating photonic and electronic components into a single compact platform, we provide a scalable, energy-efficient interconnect solution that meets the needs of AI-driven data centers.
Can you elaborate on the key innovations in ST’s next-generation optical interconnect technologies?
ST’s latest silicon photonics solution, PIC100, is a 200Gbps-per-lane silicon-only technology that delivers best-in-class power efficiency, high yield on 300mm wafers, and industry-leading integration. It also supports edge coupling, enabling seamless interconnection between AI workloads. Combined with our advanced BiCMOS technology, we deliver high-speed, low-power transimpedance amplifiers (TIA) and laser drivers, ensuring superior signal integrity.
ST is collaborating with AWS on silicon photonics. Can you share more about this partnership and its impact?
AWS is working with us to develop PIC100 as a leading-edge SiPho technology for AI and cloud applications. Their support underscores the industry demand for high-performance optical interconnects that can scale with AI workloads. This collaboration helps accelerate innovation and deployment of SiPho-based solutions in hyperscale environments.
How does ST’s silicon photonics compare to EML/VCSEL-based solutions in terms of performance?
SiPho enables higher data rates (200Gbps per lane and beyond), longer reach, and better power efficiency compared to VCSEL and EML-based solutions. Additionally, SiPho supports co-packaged optics (CPO) and chip-to-chip optical interconnects, making it ideal for future AI and cloud infrastructure.
Energy efficiency is a major concern for AI clusters. How does ST’s technology help reduce power consumption?
Our SiPho technology eliminates the need for power-hungry digital signal processors (DSPs) in certain applications, reducing overall power consumption. Additionally, our BiCMOS-based electronic ICs provide low-power, high-speed amplification and laser driving, further enhancing energy efficiency.
What are the advantages of integrating BiCMOS with silicon photonics?
BiCMOS technology plays a critical role in optical interconnects by providing ultra-high-speed, low-noise, and power-efficient electronic components. ST’s B55X BiCMOS technology enables the development of next-generation TIAs and laser drivers, ensuring low power consumption while maintaining high signal integrity.
What industries beyond AI and data centers could benefit from ST’s silicon photonics technology?
While AI and data centers are the primary drivers, silicon photonics is also gaining traction in 5G/6G infrastructure, high-performance computing (HPC), and telecom networks. The scalability of SiPho makes it a compelling solution for any industry requiring high-speed, low-power optical interconnects.
What are the biggest barriers to the widespread adoption of silicon photonics, and how is ST addressing them?
Key challenges include manufacturing scalability, ecosystem readiness, and cost competitiveness. ST is tackling these by leveraging our fully integrated IDM model, optimizing our 300mm BiCMOS and SiPho foundry capabilities, and actively collaborating with ecosystem partners to accelerate adoption.
When can we expect ST’s next-generation SiPho technology to be commercially available? We are targeting production ramp-up in the second half of 2025. Our design wins with major transceiver manufacturers and silicon photonics design houses indicate strong industry adoption, and we are confident in our ability to support the AI and cloud market with best-in-class optical interconnect solutions.
