New Portfolio Leapfrogs the Competition with Innovative Etch Techniques and Chemistries to Support Development of Advanced Logic and Memory Solutions
FREMONT, Calif., Feb. 9, 2022 – Lam Research Corp. (NASDAQ: LRCX) today announced a new suite of selective etch products that apply breakthrough wafer fabrication techniques and novel chemistries to support chipmakers in the development of gate-all-around (GAA) transistor structures. Composed of three new products – Argos®, Prevos™ and Selis® – Lam’s selective etch portfolio provides a powerful advantage in the design and manufacture of advanced logic and memory semiconductor solutions.
As modern technologies and devices continue to evolve, the need for greater device density for improved performance and efficiency increases. To keep pace with Moore’s Law, chipmakers are now developing transistor structures vertically – an exceptionally complex process that requires ultra-high selectivity, precision etching and uniform isotropic removal of material without modifying or causing damage to other critical material layers.
Lam’s selective etch solutions provide the ultra-high, tunable selectivity and damage-free material removal required to support advanced logic nanosheet or nanowire formation, enabling chipmakers to make the next evolutionary leap from planar to three-dimensional structures for DRAM as it reaches its planar scaling limit.
Developed in collaboration with the world’s most innovative logic and foundry chipmakers, Lam’s selective etch products are already being used in the fabs of industry leaders like Samsung Electronics to support nearly a dozen critical steps in the advanced logic wafer development process.
“The semiconductor industry is continuously driven toward more powerful and faster device capability. As the density and complexity of the devices have been increasing significantly, selective etch technology is critical to manufacturing our most advanced logic device,” said Dr. Keun Hee Bai, Master of Semiconductor R&D Center at Samsung. “As global demand for Samsung’s technologies continues to soar, we rely on the extensive innovation and capabilities of selective etch to bolster production and accelerate our logic device roadmap toward advanced logic GAA and beyond.”
The Lam selective etch portfolio is composed of three new tools:
• Argos, with revolutionary MARS™ (Metastable Activated Radical Source) technology, selectively modifies and decontaminates wafer surfaces. Its groundbreaking treatment and conditioning capabilities enable chipmakers to treat wafer surfaces precisely, optimizing them for peak performance.
• Prevos enables atomic layer precision, ultra-high selectivity etching for oxide, silicon, and metal by combining novel chemistries and innovative vapor technology with agile temperature control. Prevos leverages a new proprietary chemical technology solution developed by Lam; additional chemistries can be added to support chipmakers’ production needs.
• Selis uniquely employs both radical and thermal etch capabilities to enable ultra-high selective etching with uniform top to bottom process control without causing damage to the wafer structure.
• Prevos and Selis can also be delivered as a single, integrated tool to provide unique multi-layer selective etching, improved queue-time control, and maximum production flexibility.
“Lam Research is driving the wafer fabrication advancements needed to support the chip industry’s move to 3D architectures and make the next generation of digital technologies a reality,” said Tim Archer, president and chief executive officer at Lam Research. “For more than 40 years, Lam has led the industry in etch innovation. We are proud to continue that tradition with the delivery of the most cutting-edge suite of selective etch solutions for advanced logic and memory available in the market today.”
To learn more about Lam’s selective etch innovations:
• Read the blog posts from Lam Research president & CEO Tim Archer and Vahid Vahedi, SVP& GM of Lam’s Etch Business Unit
• Visit the Lam Selective Etch portfolio product page
