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Program in ‘C/C++’ with near-optimal performance out-of-the-box
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High performance, multi-purpose fixed and floating point VLIW DSP
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Comprehensive data-type support with auto-vectorization
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Real-time control with flexible memory subsystem, integrated DMA controller and memory protection unit
SAN JOSE, Calif., July 26, 2016—Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the availability of the new Cadence® Tensilica® Fusion G3 digital signal processor (DSP), a multi-purpose, high-performance DSP ideal for compute-intensive system-on-chip (SoC) designs. The Tensilica Fusion G3 DSP is exceptionally easy to program and ideal for use in automotive, consumer, internet-of-things (IoT) and industrial applications that combine intensive audio, imaging, communications, radar and embedded DSP computation. For more information, visit: cadence.com/go/FusionG3.
“As we continue to broaden our customer base, we are solving a wider range of SoC challenges. The flexibility of the new Tensilica Fusion G3 DSP is perfect for customers running a diverse set of software applications,” stated Steve Roddy, senior group director of product marketing for Tensilica in the IP Group at Cadence. “With advanced development tools including auto-vectorization and extensive library support, the Tensilica Fusion G3 DSP provides our customers with an easy development flow and higher performance out-of-the-box for their next-generation applications. Even those with extensive floating-point performance requirements can quickly port existing code to the Tensilica Fusion G3 DSP with the optional Vector Floating-Point unit.”
The Tensilica Fusion G3 DSP expands on the multi-purpose Tensilica Fusion DSP product family introduced in 2015. When compared to the Tensilica Fusion F1 DSP, the Fusion G3 DSP shares the same base Xtensa instruction-set architecture (ISA), while adding richer and higher throughput DSP instructions. Ideal for more compute-intensive applications including radar, imaging and mid- to high-end audio pre/post-processing, it delivers this performance with quad 32-bit integer MACs and quad single-precision 32-bit floating-point MACs.
“Cadence has long supplied function-specific DSPs for audio, imaging/vision and baseband signal-processing workloads. In fast-evolving markets like automotive and IOT, however, where DSP requirements are known to be changing, a narrowly-focused DSP is not always the best choice,” said Mike Demler, senior analyst of The Linley Group. “In these markets, there is an emerging demand for high performance, multi-purpose DSP IP which supports a wider range of data types and operations, including both fixed and floating point. A single, extensive, DSP instruction set architecture (ISA) that handles many different compute-intensive signal processing tasks, can future-proof SOC designs in fast changing markets.”
Combining high-performance signal processing with configurability and extensibility allows significant customer flexibility in hardware and software design choices. The Tensilica Fusion G3 DSP was co-designed with a lead customer and has already been taped out in silicon earlier this year. The Fusion G3 DSP will be available for broad licensing in October 2016.
Tensilica processors have been licensed by 17 of the top 20 semiconductor vendors, have over 250 licensees, with 1000s of different cores in silicon. The Xtensa architecture is one of the most popular licensable processor architectures, shipping over 3B cores in 2015, in products spanning sensors to supercomputers.
