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Altera Accelerates High-capacity FPGA Design with Quartus Prime Pro Design Software

Electronics Maker by Electronics Maker
May 10, 2016
in Electronics News
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Production Software Release Improves Design Productivity and Time-to-Market for Next-generation, High-Capacity FPGAs

Hong Kong — May10, 2016 –Altera, now part of Intel, today announced the production release of the new Quartus®Prime Pro designsoftware, which further accelerates FPGA design performance and design team productivity. The QuartusPrime Pro softwareis architected to support the next generation of high capacity, highly integrated FPGAs from Intel, which will drive innovation across the cloud,data center, Internet of Things, and the networks that connect them. Thecapabilities built into the latest software release accelerate large FPGA design flows by delivering unprecedented compile time improvements, versatile design entry methods and simplifiedintellectual property (IP) integration.

“QuartusPrime Pro design softwarebuilds upon decades of software innovationsthat help to shorten FPGA design cycles and make our tools easierto use,” said Bernhard Friebe, director of FPGA software and IP marketing at Intel. “Thesoftware tools, IP cores and design entry methods that we offer will broaden and strengthen Intel’s FPGA user base, while significantly increasing designer productivity and enhancingthe overall customerexperience.”

The Quartus Prime Pro software v16.0 delivers a design methodology that is optimized for large designs with more thanone million logic elements. At the same time, users can leverage the software’s incremental optimization feature to reduce design iterations and accelerate timing closure.

Quartus Prime Pro Software v16.0 highlights:

  • Production release of Quartus Prime Pro Edition with hierarchical databases, targeting the next generation of high capacity, highly integrated FPGAs from Intel.
  • Production release ofBluePrint platform designer, which reduces design iterations by 10X by allowing designers to make pin assignments and clock planning early in their design.
  • Qsys Pro system integration tool with a hierarchical framework to support multiple design entry formats and simplify IP integration.
  • Incremental optimization support to reduce design iterations.
  • Partial reconfiguration support for Arria 10 FPGAs &SoCs.

Additional information about the features in the QuartusPrime Pro design software version 16.0 can be found at www.altera.com/whatsnew.

Access to Altera’s Expanding IP Portfolio

The QuartusPrime design software provides users access to anexpandingselection of IP cores. These IP cores, in combination with numerous IP usability enhancements, help to improve designer productivity by simplifying IP evaluation, IP selection and hardware verification. New Ethernet, Hybrid Memory Cube memory and Video IP cores extend the comprehensive suite of high-performance, low-latency IP cores for industry-standard protocols. More information about Altera’s IP solutions can be found at the “what’s new in IP” web page.

Tags: FPGASemiconductor & IC
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