ATLANTA, GA ― October 2014 ― Akrometrix LLC, the leader in elevated temperature surface characterization, will present and exhibit at the 36th International Electronics Manufacturing Technology Conference (IEMT), scheduled to take place November 11-13, 2014 at the Renaissance Johor Bahru Hotel in Johor, Malaysia. Ken Chiavone, Vice President of Engineering, will present “Analyzing Package-on-Package (PoP) Reflow Assembly Interfaces with Interconnect Gap Analysis.”
The product design and manufacturing processes related to package-on-package (PoP) devices continue to evolve, driven by the needs of mobile device OEMs and their end-user customers. Trends in the semiconductor industry are driving PoP assemblies to be thinner and smaller, while containing more interconnects than ever before. As the components that constitute a PoP device become thinner, with smaller-pitch solder joints, dynamic warpage during the reflow process has more potential to cause problems such as Head-in-Pillow and non-wet opens. This paper presents the latest technology for analyzing the compatibility of the assembled components to predict how well they will reliably solder, by evaluating how well their shapes match at each critical temperature throughout the reflow profile.
Chiavone leads the Product Development group at Akrometrix with an emphasis on integrating advanced technological capabilities with user experience, and generating results for product owners that deliver value to their organizations. He is a graduate of Mercer University and for the last 20 years has designed innovative solutions in the industrial, medical, software and metrology industries.
Also at the show, company representatives will demonstrate the Interface Analysis software that allows allow high level and in-depth review of the attachment interface between two surfaces that warp during a microelectronics production reflow profile.
For more information, visit www.akrometrix.com.
