Presenting 5 design technologies uses latest techniques for designing robust and high performance electronics and integrated circuits on a new technological paradigm.
1. FinFETs A New Milestone in Integrated Circuit Manufacturing
2. Test your prototypes and electronics with Circuit Scribe Pen
3. NanoSpice – Next Generation Simulation
4. Power Semiconductor Design Drives Isometric Packages
5. New technique: Electronics Circuits with Liquid Metal Printing
FinFETs A New Milestone in Integrated Circuit Manufacturing
The semiconductor industry is in a race to shrink integrated circuit (IC) size and improve performance.
The FinFET is a transistor design, first developed by Chenming Hu and colleagues at the University of California at Berkeley, which attempts to overcome the worst types of short-channel effect encountered by deep submicron transistors, such as drain-induced barrer lowering (DIBL). These effects make it harder for the voltage on a gate electrode to deplete the channel underneath and stop the flow of carriers through the channel – in other words, to turn the transistor Off. By raising the channel above the surface of the wafer instead of creating the channel just below the surface, it is possible to wrap the gate around up to three of its sides, providing much greater electrostatic control over the carriers within it.
FinFET advantages
At such an early stage in its commercial development, the implications of the FinFET are not entirely clear although results from Intel’s work suggest that the impact on digital
Circuit Design
design need not be that great if conservative approaches are taken. A key difference between finFET-based design and that using conventional planar devices is that the freedom to choose the device’s drive strength is reduced, especially for devices that are close to the minimum size, as drive strength can only be improved during layout by adding more fins. The effective width of the device becomes quantized, and the quantization effect is worse for smaller transistors for which the next step up from the minimum-size device is one that is twice as wide. In addition, the minimum number of fins may be two in practical manufacturing processes. This is due to the self-aligned spacer processes that are used to create fins at tight pitches – each sacrificial spacer element that is deposited creates a pair of fins.
The Intel designers worked on the basis that whenever the optimum number of fins to achieve a particular drive strength was not an integer, they would round up to the next whole number – so that fractional fins were replaced with a full fin – rather than inserting transistors with less than optimal drive strength and risking the circuit not meeting timing.
Test your prototypes and electronics with Circuit Scribe Pen
Drawing a circuit out can give you an idea of how it works and help you visualize the end result. Electronink Incorporated has developed a rollerball pen that uses conductive ink. You can have a fully functional circuit as quick as you can draw it.
The Circuit Scribe pen allows you to test out prototypes and electronics without going through the hassle of building a complete board. There are no wires, soldering, or boards required. Simply draw out your design, and use a coin battery and LED to see if it works. You don’t have to draw it on any special medium either, simply sketch it out on paper and you can have a working circuit to test before you build. There is no lag time in testing either. The ink dries instantly allowing you to start testing as soon as you finish your sketch.
For those who may be interested, this pen can be used to draw and test any type of circuit. You can work on a simple switch or a complicated touchscreen design. Because you can do all your testing on the paper, it saves time and money. If you mess up, simply scrap the paper and start over.
NanoSpice – Next Generation Simulation
New simulation technology is essential for deep nanometer technology designs where process variations significantly impact circuit yield and performance. The need for gigascale simulations is being driven by complex designs and because of the large number of simulations required to design for variation effects. Traditional Spice simulators lack capacity requirements even with parallelization. FastSPICE simulators that deliver capacity at the cost of accuracy are losing steam as an increasing number of designs require post-layout verification that weakens circuit hierarchy. FastSPICE’s table model approach, as well as its approximated matrix solutions, is prone to unreliable results and poor usability for complicated gigascale designs with multiple operating modes and supply voltages.
NanoSpice is a pure SPICE circuit simulator matching the industry’s highest accuracy standard. Because it shares the same core Spice engine with ProPlus’ BSIMProPlus, the de facto golden device modeling software used by all leading foundries, it has built-in foundry-validated accuracy and compatibility. It has full Spice analysis features and supports industry-standard inputs and outputs.
NanoSpice runs 10 to more than 100 times faster than traditional Spice simulators. It is able to handle all circuit types, with an ability to simulate large-scale circuits of 50 million or more elements for generic circuit types, and 100 million or more elements for memory circuits.
It is suited for applications such as memory, analog/mixed-signal, I/O, custom digital, and standard-cell design. NanoSpice handles challenging designs, including the characterization of large embedded SRAM blocks, post-layout analysis of analog circuits, sign-off simulation of full-chip power IC or wireless transceiver circuits, and accurate clock tree and critical path analysis.
For example, NanoSpice was used to simulate a multi-million element, post-layout analog/digital converter (ADC) circuit in less than two days with pure Spice-comparable accuracy measured in signal-to-noise ratio (SNR). Other parallel SPICE simulators took several weeks to complete this task.
In another example, a 50 million transistor SRAM block was successfully simulated using NanoSpice in memory mode when other parallel Spice simulators could not run a design this large.
Developed to enable gigascale simulation and for handling process variations from 3-sigma to high-sigma Monte Carlo simulations with full matrix solving and without approximations in model calculations, NanoSpice uses effective model-handling and high-performance parallelization technology with high memory efficiency. In a recent evaluation, NanoSpice ran sign-off simulation on a 576 million element, full-chip memory circuit in eight hours using eight threads with 15 gigabytes of memory consumption.
NanoSpice is tightly integrated with ProPlus’ DFY platform NanoYield for variation analysis with efficient process, voltage, and temperature (PVT) corner sampling, fast Monte Carlo or silicon-proven, high-sigma sampling with technology licensed from IBM.
When a large number of simulations are required, NanoYield enables near-linear scaling over multiple CPUs on a server or distributed computer farm, delivered through a cost-effective parallelization license model. The tight integration between NanoSpice and NanoYield can accelerate variation analysis to achieve the optimum yield versus power, performance and area trade-off by more than 20 times over using NanoYield with an external simulator.
Power Semiconductor Design Drives Isometric Packages
New families of power semiconductors which require new approaches in board design for thermal and power management – BPA Consulting research. A number of board level solutions are emerging in response. The report has identified 12 major types segregated by:
current management- copper planes, embedded bus bars, discrete wiring or strips
board layup- number of layers, use of internal/external dissipator planes
These types offer a wide range of thermal and power management capabilities, and have been characterised in terms of the power densities they are capable of managing with less than 10°C temperature rise through the board thermal path. Solutions typically range from 0.25W/cm2 up through 35W/cm2- through the board.
This range of capabilities is proving to be critical as power conversion, management, and control becomes digital and advances in power semiconductor technology combined with the cost advantages of automated assembly drive development of new and smaller surface mount packaging.
High Power in Small Packages
One of these is the “isometric” family of packages, developed by International Rectifier and marketed as the “DirectFET®.” A similar package is offered under license to IR by Infineon – the “CanPAK™.” These devices are “isometric” because they provide a balanced thermal pathway both into the board and, if necessary, out through the top of the package.
“Isometric” packages provide dual thermal pathways: into the board and out to ambient.
In addition to thermal challenges, the power applications typically serviced by MOSFETs or IGBTs in isometric packaging involve currents from 50 to several hundred amperes. This is well in excess of the 10 – 15A typically considered the top end for conventional printed circuit boards, and managing these current levels involves a different and unique set of board design criteria.
New Technique: Electronics Circuits with Liquid Metal Printing
A simple way to print circuits on a wide range of flexible substrates using an inkjet printer has eluded materials scientists.
One of the dreams of makers the world over is to be able to print electronic circuits on more or less any surface using a desktop printer. The great promise is the possibility of having RFID circuits printed on plastic or paper packaging, LED arrays on wallpaper and even transparent circuits on glass. Or simply to rapidly prototype circuits when designing new products.
There are no shortage of conducting inks that aim to do this but they all have drawbacks of various kinds. For example, many inks have low or difficult-to-control conductivity or need to be heated to temperatures of up to 400 degrees C after they have been printed thereby limiting the materials on which they can be printed. The result is that the ability to print circuits routinely on flexible materials such as paper or plastic has remained largely a dream.
Research at the Technical Institute of Physics and Chemistry in Beijing worked out how to print electronic circuits on a wide range of materials using an inkjet printer filled with liquid metal. And they have demonstrated the technique on paper, plastic, glass, rubber, cotton cloth and even an ordinary leaf.
The new technique is straightforward. The magic sauce is a liquid metal: an alloy of gallium and indium which is liquid at room temperature. They simply pump it through an inkjet printer to create a fine spray of liquid metal droplets that settle onto the substrate.
The droplets rapidly oxidise as the travel through the air and this oxide forms a surface layer on each drop that prevents further oxidisation. That’s handy because the liquid metal itself does not easily adhere to the substrates. But the metal oxides do and this is the reason, say Jing and co, that the circuits adhere so well to a wide range of surfaces.
They also say it’s relatively easy to create almost any circuit pattern, either by moving the printer head over the substrate or by using a mask. And they’ve demonstrated this by printing conducting circuits on cotton cloth, plastic, glass and paper as well as on a leaf.
That looks to be a useful development. The ability to print circuits in magazines or on t-shirts will surely attract much interest. And being able to test circuit designs by printing them out using a desktop printer will be invaluable to many makers.
Perhaps most exciting of all is that the technology behind all this is cheap and simple: there’s no reason why it couldn’t be pushed to market very rapidly. And that raises the prospect of being able to print prototype circuits in small businesses and even at home.
Could it be that liquid metal printers could bring about the same kind of revolution in home-built electronics that 3D printers triggered with material design? And might it be possible to combine them into a single machine that prints functional electronic devices?
