Xilinx Strengthens Embedded Vision and Industrial IoT Portfolio with Expanded Ecosystem and Platforms. In the interview with Mr. Giles Peckham, Regional Marketing Director, Xilinx Inc. shares here IIoT revolution, key challenges and how FPGA accelerates innovation.
How does Industrial IoT enable new wave of productivity?
The Industrial Internet of Things (IIoT) is driving the fourth wave of the industrial revolution. It is dramatically altering manufacturing, energy, transportation, cities, medical, and other industrial sectors. Most experts believe that IIoT is happening now and with very tangible, measurable business impact.
The IIoT enables companies to collect, aggregate, and analyze data from sensors to maximize the efficiency of machines and the throughput of an entire operation. Applications include motion control, machine-to-machine, predictive maintenance, smart energy and smart grid, big data analytics, and smart and connected medical systems.
What are the challenges in implementing the Internet of Things for Industrial Applications?
With the advent of the 4th Industrial revolution, referred to as Industry 4.0 or the Industrial Internet of Things (IIoT), machines and systems are becoming more intelligent and better connected at a rapid pace. This connectivity has enabled data from the operational domain – the OT – to reach into the IT domain. The combination of connectivity and the proliferation of sensors generating data has created a tidal wave of information that before was not readily accessible, and yet this holds the key to unlocking more efficient and reliable operations of these connected machines and systems.
Customers that understand and are aware of the IIoT recognize that they need to adapt to the challenges of the next phase of the Industrial revolution. These include, for instance, functional safety, security and cyber security to prevent hacking.
Other challenges faced by customers are real-time dataprocessing (especially with machine learning and computer vision applications requiring better performance), andthe challenge of requiring more flexibility in order to adapt to fast-changing standards and any-to-any connectivity.
How FPGA accelerate IIoT innovations?
Spanning a broad spectrum of applications, Xilinx All Programmable Technologies provide real time processing and analytics for time-critical applications involving data acquisition, processing, analysis and response. Providing an ideal mix of software intelligence and hardware optimization, Xilinx Programmable Technology, with an emphasis on the Zynq® UltraScale+™ MPSoC family provides an ideal platform that combines real-time communications with high performance processing.
These applications include:
- Smart Grid for substation automation control – with requisite nanosecond synchronization to prevent power grid brownouts
- Smart Manufacturing with demanding precision time critical control for Motor and Motion Control to Avionics in guidance system for real time trajectory corrections
- Smart Medical with video and voxel analytics required for real time tissue identification, and spatial geometric overlays to accurately analyze internal tissues, organs and bones.
Only Xilinx provides a flexible standards-based solution that addresses the challenges mentioned above by combining software programmability, real-time processing, hardware optimization and any-to-any connectivity with the security and safety needed for Industrial IoT systems. Xilinx SDAccel™, SDSoC™ and Vivado® High-Level Synthesis all enable customers to quickly develop their smarter, connected and differentiated applications.
What about IIoT security and FPGA advantages?
Xilinx works closely with government agencies such as NIST in order to provide a complete security solution. The solution provides silicon features, IP, and design flows to meet TRUST specifications and provide solutions for anti-tampering and information assurance.
Xilinx has been at the forefront of providing FPGA AT solutions for many years. The Virtex-II device was the first FPGA with bitstream encryption, extended by additional AT solutions in Spartan®-6, Virtex®-5, Virtex-6, 7 series, and UltraScale Architecture Devices, including bitstream authentication in Virtex-6, Virtex-7 and UltraScale Architecture devices. Xilinx also offers a soft IP core, Security Monitor, providing certain tamper protections after configuration.
By taking advantage of various Xilinx FPGA AT features, a systems engineer can choose how much AT to include with the FPGA design. AT can be in the form of enabling individual silicon AT features or a combination of these AT features to cover three main AT categories:
- Prevention – For example, bitstream encryption and authentication
- Detection – For example, voltage and temperature monitoring
- Response – For example, bitstream BBRAM decryption key erasure penalty
Formally known as the Single Chip Cryptography (SCC) flow, Xilinx Isolation Design Flow (IDF) provides fault containments at the FPGA module level, enabling single-chip fault tolerance by various techniques including modular redundancy, watchdog alarms, segregation by safety level, and isolation of test logic for safe removal. More information is available on the Isolation Design Flow webpage.
Xilinx algorithm implementations have achieved Algorithm Validation Program (CAVP) certification.
- AES: Certificate #2363
- HMAC: Certificate #1465
- SHA2-256: Certificate #2034
- RSA : Certificate #1224
Additionally, the algorithm implementations that are used to securely configure Xilinx 7 Series FPGA and ZynqSoC devices have been independently validated as being correct by an NIST-accredited security testing laboratory. These validations have been entered on the NIST Cryptographic Algorithm Validation Program (CAVP) website here.
Xilinx Zynq®-7000 SoCs and Zynq® UltraScale+™ MPSoCs support a Defense in Depth approach to Cyber Security through a combination of in-house solutions and an extensive ecosystem, which provide comprehensive coverage of evolving standards. Additionally, Xilinx is a foundational technology provider of the Industrial Internet Consortium (IIC) Security Claims Evaluation Testbed, enabling 3rd parties to validate their Cyber Security claims. Xilinx provides validated solutions throughout the chain of trust from supply chain through run-time enabling customers to build their applications on a strong root-of-trust. These multi-layered security solutions include (but not limited to):
- Secure Communication Engines (e.g. Cryptographic Software Libraries and Hardware Acceleration)
- Run-Time Security/Isolation via Embedded Software, Hardware, and Design Flows (e.g. Hypervisors, TrustZone, Protection Units)
- Hardware Root-of-Trust (e.g. Secure Boot, Measured Boot)
- Trusted Supply Chain
The foundation of security TRUST is to ensure that only the true and intended devices, software, firmware, and IP used in the systems do only what they are designed to do and nothing more. Xilinx actively evaluates and monitors open standards such as NIST Standard 800-161 and 5200.44 to meet and exceed these documented specifications.
Let us talk about your recently unveiled PCI Express® Gen4 standard?
Xilinx has recently announced an achievement in PCI Express® Gen4 capability. Together with IBM, the two companies are first to double interconnect performance between an accelerator and CPU through the use of PCI Express Gen4 compared to the existing widely-deployed PCI Express Gen3 standard. Gen4 doubles the bandwidth between CPUs and accelerators to 16 Gbps per lane, thereby accelerating performance in demanding data center applications such as artificial intelligence and data analytics.
Since the introduction of PCI Express in 2003, Xilinx has been a leader in PCI™ interconnect-based solutions, offering PCI Express compliance across its All Programmable FPGA families. Today IBM and Xilinx have achieved Gen4 interoperability between Xilinx® 16nm UltraScale+™ devices and IBM POWER9 processors, demonstrating the first-ever PCIe Gen4 capability in a programmable device.
How it accelerates the future of data computing?
Three years ago, Xilinx launched new design environments SDAccel™ and SDSoC™ to accelerate data computing.
The SDAccel development environment for OpenCL™, C, and C++, enables up to 25X better performance/watt for data center application acceleration leveraging FPGAs. SDAccel, member of the SDx™ family, combines the industry’s first architecturally optimizing compiler supporting any combination of OpenCL, C, and C++ kernels, along with libraries, development boards and the first complete CPU/GPU like development and run-time experience for FPGAs.
First Architecturally Optimizing Compiler for OpenCL, C, and C++
- Architecturally optimizing compiler delivers up to 25X better performance/watt compared to CPU/GPU
- Delivers 3X the performance and resource efficiency of other FPGA solutions
- Enables new or existing OpenCL, C and C++ code for creating high performance accelerators
First Complete CPU/GPU-Like Development Experience on FPGAs
- First complete software development environment targeting FPGAs
- Optimize applications on FPGA platforms with little to no FPGA experience
- Easily migrate applications to FPGAs while maintaining and reusing OpenCL, C and C++ code
First complete CPU/GPU-Like Run-time Experience on FPGAs
- Supports large applications with multiple programs and CPU/GPU-like on-demand loadable compute units
- Maintains system functionality during program transitions and keeps critical system interfaces and functions live during application execution
- Allows FPGA accelerators to be shared across multiple applications using on-the-fly compute unit reconfiguration
The SDSoC™ development environment provides a familiar embedded C/C++/OpenCL application development experience including an easy to use Eclipse IDE and a comprehensive design environment for heterogeneous Zynq® All Programmable SoC and MPSoC deployment. Complete with the industry’s first C/C++/OpenCL full-system optimizing compiler, SDSoC delivers system level profiling, automated software acceleration in programmable logic, automated system connectivity generation, and libraries to speed programming. It also enables end user and third party platform developers to rapidly define, integrate, and verify system level solutions and enable their end customers with a customized programming environment.
- Easy to use Eclipse IDE to develop a full Zynq All Programmable SoC and MPSoC system with embedded C/C++/OpenCL applications
- Accelerate a function in Programmable Logic (PL) with a click of button
- Supports bare metal, Linux and FreeRTOS as target OS
- Xilinx libraries are available as part of Vivado HLS and optional hardware optimized libraries available from Alliance Members
- OpenCL support is in early beta in 2016.3. Contact your local sales representative for access request
System-Level Profiling
- Rapid performance estimation and area estimation including PS, data communication and PL in minutes
- Automated run-time instrumentation of cache, memory and bus utilizations
- Enables early and rapid generation and exploration for optimal total system architecture
Full System Optimizing Compiler
- Compiles C/C++/OpenCL applications into a fully functional ZynqSoC and MPSoC system
- Automatic function acceleration in programmable logic generating both the ARM software and FPGA bitstream
- Optimizes the system connectivity and allows rapid system exploration of throughput, latency and area tradeoffs
Expert Use Model for Platform Developers
- Target custom board by proven methodology to convert existing Vivado project and software project into SDSoC
- Board Support Packages (BSP) for Zynq-based development boards are available today including the ZCU102, ZC702, ZC706, as well as third party boards and System-on-Module (SoM) including Zedboard, Microzed, Zybo, Avnet Embedded Vision Kit, Video and Imaging Kit, SDR kit and more.
