SAN JOSE, Calif., August 3, 2015— Cadence Design Systems, Inc. announced that Realtek Semiconductor Corp. utilized the Cadence® Palladium® XP platform to accelerate the successful development and verification of a recent system-on-chip (SoC) design. With the Palladium XP platform, Realtek achieved up to 250X faster acceleration versus its previous methodology and was able to improve quality by executing system simulations six months before the silicon was available.
Due to the integrated nature of the Cadence System Development Suite, Realtek was able to save time by reusing over 90 percent of its simulation environment setup for Cadence Incisive® Enterprise Simulator on the Palladium XP platform, along with its previous emulation environment. Additionally, the power analysis capability of the Palladium XP platform, along with the ability to test software loads on the emulated system before silicon was available, allowed Realtek to optimize system-level power prior to silicon availability to within five percent of the SoC’s actual power measurements in-silicon.
“Our customers demand exceptional product quality,” said Realtek Vice President and Spokesman, Yee-Wei Huang. “Leveraging the combination of the Cadence Incisive and Palladium verification platforms in the System Development Suite significantly improved our verification productivity and ultimately led to increased product quality.”
The Palladium XP platform, which is part of the Cadence System Development Suite, is a high-performance, special-purpose verification computing platform that unifies best-in-class simulation acceleration and emulation capabilities in a single environment. For more information on the Palladium XP platform, visit http://www.cadence.com/news/
