TI introduces world’s fastest 16-bit ADC, four-channel 14-bit ADC, and digital variable gain amplifier, delivering highest performance for wideband equipment

Industry’s first 16-bit 1-GSPS ADC, four-channel 14-bit 500-MSPS ADC, and 4.5-GHz DVGA with DC-coupling offer best-in-class signal analysis accuracy

Bangalore, 14 May 2015 — Texas Instruments (TI)  announced the ADS54J60, the industry’s first 16-bit 1-GSPS analog-to-digital converter (ADC) and the first to achieve over 70dBFS signal-to-noise ratio (SNR) at 1-GSPS. TI also announced the highest density four-channel 14-bit 500-MSPS ADC, the ADS54J54. To optimize the signal chain, TI’s new 4.5-GHz LMH6401 fully differential digital variable gain amplifier (DVGA) offers the widest bandwidth with DC coupling and allows signal acquisition of low and high frequencies without the limitation of baluns used in AC-coupled systems. These ADCs work together with the amplifier to provide the highest performance, lowest power and space savings in defense and aerospace, test and measurement, and communication infrastructure applications.

TI will demonstrate these high-performance devices at the International Microwave Symposium (IMS) on May 17-22 in Phoenix, Arizona, at booth #2614.

Key features and benefits of the ADS54J60 and ADS54J54 ADCs include:

• Highest speed in their classes: The 16-bit 1-GSPS ADS54J60 ADC and the 14-bit 500-MSPS ADS54J54 allow higher frequencies with more accurate signal analysis.
• Highest dynamic performance: ADS54J60 offers more than 3 dB better SNR (70 dBFS at F_IN=170 MHz) compared to competitive ADCs, a low noise floor of -159 dBFS/Hz, and spurious-free dynamic range (SFDR) of 86 dBc. These enable high spectral purity and the ability to find weak signals in the presence of large, unwanted blockers.
• High density: ADS54J54 is 50 percent smaller than competitive ADCs, offering four channels in a 9-mm-by-9-mm package. ADS54J60 offers two channels in a 10-mm-by-10-mm package.
• Reduces the data interface speed and external processor resources: Integrated digital down converter (DDC) offers programmable decimation or a bypass mode.
• Simplified board routing and device synchronization: Both ADCs offer the high-speed JESD204B serial data interface, which simplifies connections to processors, including the 66AK2L06system-on-chip, and FPGAs.
• Low power:Both new ADCs offer 20 percent lower power consumption than competitive ADCs.

Key features and benefits of the LMH6401 DVGA include:

• Industry-leading bandwidth with support for DC coupling:4.5 GHz with programmable gain of -6 dB to 26 dB and DC coupling enables signal acquisition of low and high frequencies. This allows for the full verification and analysis of signals in test and measurement applications.
• High linearity: OIP3 of 43 dBm at 200 MHz and -63/-63 dBc second- and third-order harmonic distortion at 1 GHz (2Vpp).
• Large gain range:32 dB of gain range and 1 dB step control optimize dynamic range of the signal chain.
• Lowest power consumption in the industry:Uses 355 mW at 5V—more than 40 percent less power than the competition.
• High density: 3-mm-by-3-mm package is more than 40 percent smaller than competitive amplifiers.