2,666 Mbps DDR4 Memory Interface in Arria 10 FPGAs and SoCsOptimized for Data-Intensive Applications
Hong Kong, December 19, 2014 – Altera Corporation announced it is demonstrating in silicon DDR4 memory interfaces operating at an industry-leading 2,666 Mbps. Altera’s Arria® 10 FPGAs and SoCs are the industry’s only FPGAs available today that support DDR4 memory at these data rates, delivering a 43 percent improvement in memory performance over previous generation FPGAs and a 10 percent improvement in memory performance over competing 20 nm FPGAs. Hardware designers today can use the latest Quartus® II software v14.1 to enable2,666 MbpsDDR4 memory data rates in Arria 10 FPGA and SoC designs. A video demonstration showing robust memory interfaces operating at 2,666 Mbps with margin is available for viewing at www.altera.com/arria10.
Arria 10 FPGAs and SoCs are the industry’s highest performance 20 nm FPGAs and SoCs, offering a one speed-grade advantage over competitive solutions. Supporting the industry’s highest DDR4 memory performance enables communications, compute and storage, and video processing applications to execute high memory bandwidth in their systems, in a cost-effective, low-power manner. Arria 10 FPGA and SoC memory interfaces support today’s leading-edge, high-speed memories, including HMC, DDR4, DDR3, LPDDR3, RLDRAM3, and QDR-IV/-II+ Xtreme/-II+/-II.
“We architected the external memory interfaces in Arria 10 FPGAs and SoCsto provide hardware designers an easy-to-use, high-performance way to get data into and out of the device,” said Raj Patel, senior manager, midrange products, Altera Corporation. “By delivering the industry’s fastest DDR4 data rates we are able to meet our customers’ evolving system requirements which are being driven by the tremendous growth in data volume.”
Arria 10 FPGAs and SoCs simplify the development of systems that feature DDR4 memory by integrating a complete physical interface and memory controller into the FPGA. The memory interface is hardened in the FPGA fabric, which delivers higher performance, higher bandwidth and lower power versus a soft implementation.In addition, a hardened memory interface and controller eliminate the need for designers to use logic resources to build the DDR4 memory interface. Altera’s Quartus II software v14.1 includes a DDR4 PHY wizard and controller intellectual property(IP), which further simplifies high-performance memory interface design by automatically adapting to DIMMs from a variety of memory suppliers.
