Toshiba Selects Synopsys VC Formal Verification Solution

Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs

Bangalore, June 16, 2017  — Synopsys, Inc. (Nasdaq: SNPS) today announced that Toshiba has deployed Synopsys’ VC Formal solution as their SystemVerilog Assertion (SVA) based formal verification solution. VC Formal delivers the performance and capacity necessary to achieve faster formal convergence on Toshiba’s increasingly complex designs. Toshiba leveraged VC Formal’s native integration with Synopsys’ industry-leading VCS® functional verification solution and Verdi® debug platform to achieve faster coverage closure, more effective root-cause analysis, and earlier verification closure.

“Toshiba has deployed VC Formal as a standard SVA-based formal verification solution for the development of leading-edge automotive devices and storage products,” said Kazunari Horikawa, senior manager, Design Technology Development Department, Center for Semiconductor Research & Development, Storage & Electronic Devices Solution Company at Toshiba Corporation. “Toshiba accelerated its deployment for complex SoC designs after our first adoption of VC Formal technology in 2016. The complexity of these designs requires a verification solution that delivers best-in-class performance, capacity and ease-of-use. VC Formal enabled us to meet sign off quality for our SoCs, while reducing time to market. We continue to collaborate with Synopsys for further verification technology enhancements.”

Synopsys VC Formal delivers faster property convergence through a set of unique engines and smart engine orchestration.  Its innovative high-capacity word-level data model enables formal apps to run on large SoCs, where traditional formal products fail. VC Formal natively integrates with Verdi to provide a formal debug solution that enables simulation experts to easily leverage formal technologies for faster verification closure. VC Formal delivers accelerated debug by integrating unique Verdi engines, like Temporal Flow View and Active Trace, for automated root cause analysis of formal results. VC Formal also incorporates the robust coverage engines of VCS, allowing SoC teams to easily embed formal into their existing verification environment.

“Synopsys has a long history of successful collaboration with Toshiba on the delivery of verification solutions for advanced SoCs,” said Mo Movahed, vice president of R&D in the Synopsys Verification Group. “We collaborated with Toshiba and provided a formal verification solution that integrates into their verification flow and methodology, to improve Toshiba’s overall design quality.”


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